R&S®SMW-K551 Slow I/Q

Key Facts

  • Slowdown of complete signal generation process
  • Output of up to 8 digital IQ streams
  • Support for all important signal generator functions (including MIMO)

Brief Description

The R&S®SMW-K551 option allows slowing down of the whole digital signal generation process of the R&S®SMW200A. It enables the R&D engineer to evaluate the general functionality and the algorithms of early hardware prototypes via digital interfaces.

Features

  • Lossless slowdown of the signal generation instead of down-sampling with sample decimation allows scaled down measurements which are representative also for higher speeds.

Key Facts

  • Slowdown of complete signal generation process (incl. baseband signal generation, digital IQ output speed, AWGN and MIMO/fading simulation)
  • Output of up to 4 digital IQ streams simultaneously and up to 8 digital IQ streams in multiplex mode
  • Support for all important signal generator functions (including MIMO) allows using exactly the same stimulus for testing early prototypes and testing the later design
  • Asynchronous digital IQ output supported
  • Control of signal generation speed by DUT
  • Use of R&S®EX-IQ-Box for interface adaptation to DUT

Brief Description

To shorten the time-to-market for chipsets or modules, it is important to verify the design as soon as possible during the development process. Hence it is desired to test hardware prototypes against realistic physical signals already at a very early R&D stage.

Hardware prototypes or simulated hardware (by means of HW emulators or FPGA test boards) typically act like a speed-wise scaled-down representation of the final chip or module design. The typical stimulus for accessing the behavior of such a prototype is a digital IQ signal which also has to be scaled down accordingly in terms of timing, sample rate and bandwidth.

The R&S®SMW-K551 option allows slowing down of the whole digital signal generation process of the R&S®SMW200A (incl. baseband signal generation, digital IQ output speed, AWGN and MIMO/fading simulation). It enables the R&D engineer to evaluate the general functionality and the algorithms of early hardware prototypes via digital interfaces – without the need for a completely finished design.

Features & Benefits

  • Benefits of the R&S®SMW-K551 Slow IQ option
    • Lossless slowdown of the signal generation instead of down-sampling with sample decimation allows scaled down measurements which are representative also for higher speeds.
    • All important signal generator functions are available while in “slow IQ” mode operation, even diversity, fading or MIMO simulation. The speed of all parts of the signal generation chain is automatically controlled.
    • The DUT can control the speed at which the R&S®SMW200A is outputting the digital IQ data
    • Changing DUT speeds and asynchronous IQ data transfer can be handled due to automatic sample rate adaptation in the R&S®SMW200A
    • Multiplexing of IQ data allows output of up to 8 digital IQ data streams via four digital IQ outputs of the R&S®SMW200A. Hereby not only SISO implementations but also m x 8 MIMO prototypes can be tested.
    • The real-time faded signals (in a slowed-down fashion) are the same as they would be used to test the final product at normal speed. This allows direct comparison of the results since the influence of the signal generator on the measurements can be neglected.
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