background
PCI express Oscilloscopes Serial bus debugging

PCI Express Gen 3 - compliance and debug testing

PCI Express Gen 3 - compliance and debug testing

This webinar is intended for engineers who work on high-speed digital design and test. In particular, we will be focusing on PCIe Gen 3 interfaces. After an overview of PCIe technology, we will be discussing PCIe testing for compliance, protocol trigger and decode, and signal integrity debug purposes.

We will start with system interoperability verification. You will learn details on decoding, serial triggering, eye diagram testing, de-embedding, impedance control, and jitter analysis, which all can help to identify root causes when compliance tests fail. Practical examples and demonstrations illustrate PCIe testing made easy and reliable.

Speaker

Jithu Abraham works for Rohde & Schwarz as a product manager for the UK, Ireland and the Benelux region, specializing in oscilloscopes. He enjoys all aspects of high-speed digital, wireless communication, efficient power conversion and all the challenges they bring. Jithu holds an engineering degree in electronics and communication from the Anna University in India and a master’s degree in RF systems from the University of Southampton. He has been working for Rohde & Schwarz for over 12 years.

Jithu Abraham