Our sponsored workshop sessions are being released as webinars with live Q&A. Register to catch the series. We're also sharing demo videos straight from the show floor.
S-parameter Analysis with a Free Simulation Tool
S-parameter measurements contain more information than VNA displays reveal. This session demonstrates how to extract additional insights—including IEEE S370 similarity metrics, dispersion curves, Dk extraction, and TDR response—using an open-source analysis tool.
Speaker: Prof. Eric Bogatin — Professor at University of Colorado Boulder and author of 18 technical books on signal integrity. Over 40 years of industry experience at Bell Labs, Sun Microsystems, and Ansoft.
Eric Bogatin
Isolated Probes—Are They Really All That?
Isolated probes are rolling out rapidly, but how does one know when to use them? This session examines power integrity measurement challenges and provides a quantitative framework for probe selection, defining minimum characteristics required for each measurement type.
Speaker: Steve Sandler — Founder of Picotest with nearly 50 years in power system engineering. Internationally recognized lecturer and author on power integrity, PDN design, and distributed power systems.
Steve Sandler
Fast Material Loss Characterization to 67 GHz with Delta-L
High-speed signaling protocols now require PCB material characterization to 67 GHz. This session presents a probe-based measurement methodology using GSSG probes and the Delta-L de-embedding method detailed in IPC 2.5.5.14.
Speaker: Jim Drewniak, Ph.D. — IEEE Fellow and recipient of the IEEE EMC Society's Richard R. Stoddart Award. Cofounder of the Missouri S&T EMC Laboratory and President of Clear Signal Solutions, specializing in signal and power integrity measurements.
Jim Drewniak, Ph.D.
ML-Driven PDN Design: From Pre-Layout Synthesis to Post-Layout Optimization
Modern hardware complexity and shortened design cycles demand faster PDN design methodologies. This session introduces practical machine learning applications for power distribution network synthesis and optimization that weren't possible with conventional approaches.
Speaker: Prof. Chulsoon Hwang — Associate Professor at the Missouri S&T EMC Laboratory. Author of over 200 IEEE publications and co-recipient of 10+ Best Paper Awards from DesignCon and IEEE EMC+SIPI conferences.
Prof. Chulsoon Hwang
Beyond the LTI Barrier: Quantitative VRM Stability from Time-Domain Step Load Measurement
Traditional Bode plots fail for non-linear VRM control loops. This session introduces SEPIA, oscilloscope-embedded software that extracts quantitative stability metrics and SPICE-compatible PDN models directly from time-domain step load measurements.
Speaker: Benjamin Dannan — DesignCon 2025 Engineer of the Year and Founder of Signal Edge Solutions. Two-time DesignCon Best Paper Award recipient specializing in signal/power integrity and advanced packaging for high-performance ASICs.
Ben Dannan
Successful PCIe 6.0 and 7.0 System Design
As PCIe data rates push to 64 GT/s and beyond, system design challenges multiply. This session addresses the signal integrity and interconnect considerations essential for successful next-generation PCIe implementations.
Speaker: Steve Krooswyk — Senior Signal Integrity Design Engineer at Samtec and former PCI Express technical lead for Intel Data Center Group. Co-author of High-Speed Digital Design: Design of High-Speed Interconnects and Signaling.
Steve Krooswyk
Measuring Root Causes of Data Dependent Jitter
This presentation examines data dependent jitter (DDJ) analysis for high-speed digital signals like PCIe. As symbol rates increase and channel lengths grow, traditional oscilloscope-based methods face limitations. The session contrasts conventional approaches with signal model-based techniques that reveal DDJ root causes.
Speaker Bio: Mike Schnecker holds a BS from Lehigh University and an MS from Georgia Tech in electrical engineering. His test and measurement career spans applications, sales, and product development, with specialization in signal integrity applications using oscilloscopes and related instruments.
Mike Schnecker
Signal Integrity Challenges Overcome with High-Performance MEMS Switches
This session explores advanced MEMS switch technologies for high-speed digital and mmWave applications. Attendees will see live demonstrations of switches supporting over 64 Gbps and DC to 70 GHz, learning how their speed, density, and durability are transforming high-speed testing.
Speaker Bios: Stewart Yang and Ian Burke are Application Engineers at Menlo Micro. Stewart brings extensive semiconductor experience supporting global accounts across xDSL, 802.11, and satellite front-end technologies. Ian specializes in RF designs and filter development with expertise in wireless infrastructure and space applications.
Stewart Yang
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