Hardware Development : Senior Digital IC Design Engineer

Your tasks

• You would be joining our elite team of world class data convertor designers. Your tasks would cover the digital IC development starting from conceptual work, through design, layout, verification, and characterization of the devices. Expected tasks:
• Moving between RTL design/synthesis and verification throughout the project.
• Setup and review static timing analysis with layout engineers
• Working in the lab during device initial startup and later characterization
• Working closely with team members (system, analog, digital, verification, & production test)
• You will help to design multi‒lane SERDES interfaces for large high frequency (>30GHz) analog blocks. Additionally, provide digital designs to support multiple modes of operation, bandwidths, and digital signal processing.
• You will work with a highly qualified team of ASIC engineers, located in Hillsboro and at multiple sites in Germany.

Your qualifications

• Master’s degree in EE or CEC with 8+ years’ experience or BS degree in EE or ECE, with 10+ years’ experience
• 5+ years of RTL (System Verilog or VHDL) design, simulation, and verification of ICs
• Excellent understanding of CMOS digital design fundamentals, including knowledge of entire digital design flow: RTL, Synthesis, ATPG, Place & Route, Timing Closure, Physical Verification
• Experience in design, modeling, and simulation of the physical layer of multi‒lane SERDES links. Specifically: line encoding and lane de‒skew (8b10b, 64/66, elastic buffer, etc.)
• Ability to perform static timing analysis for designs with multiple logic and clock domains
• Self‒driven, able to work independently while coordinating with analog and digital block designers
• Strong scripting skills for working across analog / digital tools boundaries, such as Matlab, Python, Perl, and make
• You are able to communicate effectively with both team members and external partners.
• You will need to be able to travel occasionally to European and U.S. locations.
• Candidates must be current US residents with valid work authorization.
• Work effectively in a group setting (share expertise, provide and receive feedback, communicate technical issues, work in a team environment to resolve technical issues) Desirable qualifications. The more of these that you have, the better fit within our team.
• Experience with FPGA design and board‒level SERDES interfacing
• Experience with DSP logic design
• Experience with digitally assisted or controlled calibration of analog circuits
• Experience with Synopsys DC, ICC, and Primetime. Familiar with UVM.
• Experience with system level design tools (e.g. Matlab, Verilog‒AMS, etc.).
• Experience with scripting languages such as TCL, bash/tcsh, etc.
• Experience working in a mixed signal environment (e.g. Spectre)

Interested?