State of the art satellites, radars or avionics systems need to meet demanding performance requirements in the RF domain. During the design phase, careful attention must be paid to the layout of digital components, as well as to power management to create a system that is both efficient and resilient. In this webinar we will describe and discuss the challenges and solutions to evaluating signal integrity and power integrity of high-speed digital signals for aerospace applications. We will consider the potential system impacts and challenges of signal and power integrity and how we can mitigate or minimize them. With the example of an eye diagram, we will show different ways to find the root causes of signal integrity problems, and introduce solutions for sensitive electronic designs, mainly from the time domain perspective. We will provide detailed insights into design verification and testing activities. Join our webinar to learn about how to validate the performance of high-speed digital interfaces and conduct advanced power integrity measurements with test solutions from R&S.

In this webinar, you will learn about:

• Signal integrity test: Clock, PLL, ADC / DAC
• Power integrity test
• Decomposition of jitter and noise components
• Eye analysis
• Test fixture characterization and deembedding