Data converter design and testing: Your challenges
As data converters increasingly replace traditional RF systems up to the GHz-range, more focus is needed on validating the ADCs and DACs for these enhanced use cases. Since converters serve as bridging devices between analog and digital domains, any system is only as good as the converter. A fast processor and perfect amplifier are useless if the ADC/DAC cannot keep up or introduces significant noise and distortion.
New generations of high-speed data converters are designed to meet the demands of growing bandwidths and data rates, pushing the limits of clock speed and digital processing power. At the same time, factors like low latency, low power consumption, and efficient heat dissipation add further challenges during development and verification of electronic and RF designs.
Validating analog-to-digital and digital-to-analog converters, as well as testing the design’s power consumption, requires precise measurements of several key parameters.
The critical parameters in the converter designs include:
- Signal to noise ratio (SNR): defines the sensitivity of the converter by comparing the level of the desired signal to the level of background noise. It is a crucial parameter when verifying RF and microwave systems, as a higher SNR means the converter can more clearly distinguish signals from noise. This results in improved output signal quality.
- Spurious free dynamic range (SFDR): represents the ratio between the signal power and the highest spurious distortion. A higher SFDR indicates better performance in minimizing unwanted spurious signals, which is crucial for maintaining signal integrity in systems that require a wide dynamic range.
- Effective number of bits (ENOB): combines the SNR and SFDR into one measure. It is mainly defined by the SFDR value and indicates how many bits are actually useful in the target application, regardless of the theoretical resolution of the converter. It can be roughly calculated as ENOB = SFDR/6.02 + 1.76dB
- Frequency response: describes how the analog part of the converter performs in terms of sensitivity and frequency coverage across different signal frequencies and bandwidths. It ensures that the conversion process remains accurate and consistent across the full range of expected input signals.
In addition, various external factors in the target design significantly affect converter performance. These include:
- Quality of the clock signal: drives the timing of the converter. Phase noise, jitter, spurious tones, and other distortions in the clock directly affect the accuracy of the converter’s output signal.
- DC supply: provides the necessary power to the converter and is often overlooked, yet it is just as important as the clock signal. Proper power integrity from the DC supply is essential for maintaining a clean and accurate converter signal.
- Signal integrity on the board: any crosstalk or interference in the target design will interact and affect the signal quality around the converter.
As mentioned above, new converters are capable of sampling direct RF signals and are often referred to as RF-DACs or RF-ADCs. For these devices, the full range of RF testing comes into play. There are two prominent KPIs for data converters in this field:
- The intermodulation test with a 2-tone signal is the basic approach for determining RF capabilities and distortion.
- In dedicated use-cases, EVM validation using the target waveform is performed to ensure low bit error rate.
New generations of high-speed data converters address the need for growing bandwidths and data rates and place increasing demands on clock speed and digital processing power. Other aspects such as low power consumption and heat dissipation present additional challenges during the development and verification of electronic and RF designs.
